Patented Statistics building safe & efficient  embedded software

Statistical timing analysis tool helping designers of embedded systems to optimize the use of the hardware by the software

We provide statistical timing analysis of programs behavior on multicore processors for highly critical embedded system-based industries

StatInf provides software tools and services for the timing verification of real-time embedded systems in the avionics, space, defense, automotive and transportation industries. Statinf’s innovative RocqStat products use patented predictive statistics together with static analysis to provide detailed timing verification for architectures ranging from single-core systems to complex multi-cores with multi-layered software. RocqStat can be used during the design, development, and functional test phases of a project, as a software timing quality assurance tool, and in the case of post-deployment incidents as a precision targeted investigative resource. Using RocqStat reduces the effort involved in the development life cycle by accurately identifying timing sensitivities in the executed software, ensuring a robust temporal analysis. RocqStat reduces the time and effort needed to generate proven results for high level certification requirements, thanks to its TQL5 certification kit. 



Measure software predictability and detect interferences on multicores processors

Optimize shorter development cycle

Make easier and safer the reassignment task for the developer



Unique composition method to determine Multicore impact

Secure AI programs requiring complex software level and operating systems

Automatic bounds estimation for WCET on functional execution with no code instrumentation needed


Drones & Aerospace

Saving energy and time consumption

Provide data for higher Certification level and reduce difficulty to justify it

Instantly analyze of the function trace execution whatever size and complexity of the application

Current challenges in designing Embedded Systems

Non-predictability of the programs on multicores processors

Long development cycle

Difficulty to build arguments justifying their solution wrt certification/normalisation

Arrival of AI programs requiring complex operating systems


The StatInf solution is based on a statistics-oriented patented technology which validates the design of embedded systems and ensures an important decrease of the development cycle and energy consumption, while connecting safeness and security in critical areas.

The solution is adapted for large programs on heterogeneous multicore processors, while validating changes within programs in a few minutes, even for programs for which the designers have no access to the code of programs.

By combining optimization and statistical methods, StatInf not only makes it possible to make predictable the use of multi-core in the critical ES but to reduce the development cycle, to safely introduce Artificial Intelligence into the control loop, to minimize energy consumption.

Architecture Processor Configuration
Code coverage
Managing interferences


Liliana Cucu-Grosjean : portrait d’une ouvreuse de voies

Publication of the Inria article on Liliana Cucu-Grosjean, co-founder of StatInf "La méthode statistique mise au point par Liliana Cucu-Grosjean et son équipe répond quant à elle à ces deux défis. D’une part, elle permet de refaire une analyse en...

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Partnership with Airbus Avionics

After more than ten years of academic collaboration between Inria and Airbus Avionics, the collaboration between the two entities is transformed into an industrial collaboration between StatInf and Airbus

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